I2C(EEPROM) (Inter-Integrated Circuit for EEPROM 24X series)
EEPROM, or E2PROM (Electrically-Erasable Programmable Read-Only Memory), typically uses a serial or parallel interface. I2C EEPROM is a 2-wire serial EEPROM in the 24x series.
Wrong address mode / Word Address width or Ignore Glitch settings cause decode failures. For channel-prefix differences, see Settings.
Decode Settings
- Clock Channel (SCL): Transfer clock of the I2C EEPROM.
- Data Channel (SDA): Transfer data of the I2C EEPROM.
- Device Address:
- Control Code: Display Control Code. Default: this mode selected; enables (Enable) the 24LCS61 / 24LCS62 checkbox.
- 7-bit Addressing: Display a 7-bit-wide address. Forces 24LCS61 / 24LCS62 cleared and disabled (Disable).
- 8-bit Addressing (Include R/W in Address): Display an 8-bit address (7-bit address plus 1-bit Rd/Wr). Forces 24LCS61 / 24LCS62 cleared and disabled (Disable).
- Word Address: Valid bit count of the I2C EEPROM address. Default: 8. Disabled (Disable) when 24LCS61 / 24LCS62 is checked.
- 24LCS61 / 24LCS62: Analyze 24LCS61 / 24LCS62. Field enabled (Enable) when checked. Default: cleared.
- Ignore Glitch: Ignore glitches caused by slow transitions. Field enabled (Enable) when checked. Default: checked.
Result
