SMBus (SBS SPD) (System Management Bus)
SMBus (System Management Bus) is a two-wire bus (Clock / Data) derived from I2C, defined by Intel in 1995; typical clock 10 kHz–100 kHz. It can decode SMBus, SBS (Smart Battery), and SPD (Serial Presence Detect).
Wrong address mode or PEC / SBS / SPD options yields wrong report fields. See Settings.
Decode Settings
- Channel:
- SMBCLK: Clock channel.
- SMBDATA: Data channel.
- PEC: Packet Error Code. Field enabled (Enable) when checked. Default: cleared.
- 8-bit addressing (Include R/W in Address): Show 8-bit address (with R/W). Field enabled (Enable) when checked. Default: cleared.
- Show SBS: Show Smart Battery System in the report. Field enabled (Enable) when checked. Default: cleared.
- Show SPD: Show Serial Presence Detect. Field enabled (Enable) when checked (SPD type list). Default: cleared.
- Clock Stretching: Detect clock stretching. Field enabled (Enable) when checked. Default: cleared (timeout often 35000).
- Ignore Glitch: Ignore short glitches. Field enabled (Enable) when checked. Default: checked, < 2 sample points.
Result
SMBus
Show SBS (Smart Battery System)
Show SPD (Serial Presence Detect)
