Skip to content

I2S Trigger (Inter-Integrated Circuit Sound)

I2S trigger supports data-pattern match, edge/glitch/Mute/Clip, or Timing Violation. Requires SCK/WS/SD.

Timing Violation is available only when the hardware sample rate is 200 MHz. See Settings.

Trigger Settings

I2S Trigger

I2S Trigger
  • Channel: Select SCK, WS, and SD.
  • Data Bits: 1–32 bits (commonly 8/12/16/24/32). Default index is 0.
  • Method: Default index is 0 (Data Match). Related parameter fields are field enabled (Enable) or field disabled (Disable) by Method.
    • Data Match: Trigger when the audio data matches. Pattern A/B Default is 00h.
    • Rising Edge: Trigger when the later sample on the same channel is larger by more than the threshold.
    • Falling Edge: Trigger when the later sample is smaller by more than the threshold.
    • Glitch: Trigger on a short rise/fall spike beyond the threshold.
    • Mute: With threshold P, trigger when −P < X < +P.
    • Clip: With threshold P, trigger when −P < X ∪ +P > X.
    • Timing Violation: Six timing checks; enabled only at 200 MHz sample rate. Default: Setup 0, Hold 100, Period Min/Max 360/440, Duty Min/Max 160/160.
  • Data Trigger: Channel Default is Both; Compare Default index is 0; Duration Default is 1; Full-scale Voltage Default is 2000; Pattern unit Default is Value; Master/Slave Default is Master; Pass Count Default is 0.

See also